Non-volatile memory systems, such as flash memory, have been widely adopted for use in consumer products. Flash memory may be found in different forms, for example in the form of a portable memory card that can be carried between host devices or as a solid state disk (SSD) embedded in a host device. Multi-level cell (MLC) memory may be subject to endurance or performance problems as a result of data groups that are frequently rewritten. The memory device firmware may handle memory in logical groups and the logical to physical address table may have one entry for each logical group, so the data belonging to one logical group will exist in consecutive physical addresses. In particular, MLC logical group invalidation and as a result at a later point of time erase operation, may occur more frequently in the case of logical groups that are rewritten more frequently. Flash memory may be written in pages and erased in blocks, so once a page is written, a rewrite may require the whole block to be erased. In firmware, once data is rewritten, the old data may be marked as invalid so that it can be erased during garbage collection and may write the new data in another already erased block. Frequent erase operations may decrease endurance of the MLC block. A prediction of which addresses will be frequently rewritten can be used to retain the predicted addresses for a longer time in single level cell (SLC) blocks. The reason data blocks that are predicted to be frequently rewritten are retained in the SLC block may be that the endurance of SLC blocks is greater than MLC blocks and when more erases are required on a particular data block it may be preferable that it is in an SLC block.